LONDON — Researchers at IMEC are looking at the use of silicon transistors in the sub-threshold region of their operation as a way of pursuing ultra-low power goals. A future SoC for biomedical ...

Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental ...

SuVolta, Inc., a developer of scalable low-power CMOS technologies, today disclosed details of its Deeply Depleted Channel™ (DDC) low-power transistor technology, to be presented at IEDM 2011. SuVolta ...

Research is underway to develop a new type of logic device, called non-volatile logic (NVL), based on ferroelectric FETs. FeFETs have been a topic of high interest at recent industry conferences, but ...

Chipmaking systems create the smallest atomic-scale features in 3D Gate-All-Around transistors.

SANTA CLARA, Calif., April 21, 2022 (GLOBE NEWSWIRE) -- Applied Materials, Inc. today introduced innovations that help customers continue 2D scaling with EUV and detailed the industry’s broadest ...